Singar, Sumitra
Low Power Fault Tolerant Latches and Flip-flops: Design and performance analysis - Mauritius Lambert Academic Publishing 2018 - 128
This book focus on review, study and design of fault tolerant circuits to reduce circuit-level faults and protect a circuit from faults. In this book eight novel low power fault tolerant latches and four glitch free flip-flops are discussed. The latch configurations are designed with the 1P-2N structure and 2P-1N structure or 1P-2N structure, 2P-1N structure and C-element structure.
Contents
Introduction
Existing Fault Tolerant Latches and Flip-Flops
Fault Free D-Latch Configurations
Robust Fault Resistant D-Latch
Glitch Free Novel Det Flip-Flop
Near & Super Threshold Regions Impact on Power and Delay
Conclusions
978-613-9-45302-3
Lambert Academic Publishing
Electrical
621.3 / SIN
Low Power Fault Tolerant Latches and Flip-flops: Design and performance analysis - Mauritius Lambert Academic Publishing 2018 - 128
This book focus on review, study and design of fault tolerant circuits to reduce circuit-level faults and protect a circuit from faults. In this book eight novel low power fault tolerant latches and four glitch free flip-flops are discussed. The latch configurations are designed with the 1P-2N structure and 2P-1N structure or 1P-2N structure, 2P-1N structure and C-element structure.
Contents
Introduction
Existing Fault Tolerant Latches and Flip-Flops
Fault Free D-Latch Configurations
Robust Fault Resistant D-Latch
Glitch Free Novel Det Flip-Flop
Near & Super Threshold Regions Impact on Power and Delay
Conclusions
978-613-9-45302-3
Lambert Academic Publishing
Electrical
621.3 / SIN