Design Through Verilog HDL (Record no. 602)
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000 -LEADER | |
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fixed length control field | 01508nam a2200241Ia 4500 |
001 - CONTROL NUMBER | |
control field | 0002310 |
003 - CONTROL NUMBER IDENTIFIER | |
control field | OSt |
005 - DATE AND TIME OF LATEST TRANSACTION | |
control field | 20190326124603.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 170602s9999 xx 000 0 und d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
International Standard Book Number | 9788126519316 |
028 ## - PUBLISHER NUMBER | |
Qualifying information | 2016 |
Source | Allied Informatics, Jaipur |
040 ## - CATALOGING SOURCE | |
Language of cataloging | English |
Original cataloging agency | BSDU |
Transcribing agency | BSDU |
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
Classification number | 621.392 |
Item number | PAD |
100 ## - MAIN ENTRY--PERSONAL NAME | |
Personal name | Padmanabhan, T R |
245 #0 - TITLE STATEMENT | |
Title | Design Through Verilog HDL |
260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
Name of publisher, distributor, etc. | Wiley India Pvt. Ltd. India |
Place of publication, distribution, etc. | New Delhi |
Date of publication, distribution, etc. | 2015,c2004 |
300 ## - PHYSICAL DESCRIPTION | |
Extent | 455 |
500 ## - GENERAL NOTE | |
General note | If you aspire to master Verilog language and become a competent EDA professional, this book is for you. It fills the need for an elaborate construct in Verilog, and clarifies their implications, illustrating their need and utility. This is especially true fo the latest IEEE Standard 1364 for Verilog. |
504 ## - BIBLIOGRAPHY, ETC. NOTE | |
Bibliography, etc. note | Contents Preface Acknowledgements · Introduction to VLSI Design · Introduction to Verilog · Language Constructs and Conventions in Verilog · Gate Level Modeling - 1 · Gate Level Modeling - 2 · Modeling at Data Flow Level · Behavioral Modeling - 1 · Behavioral Modeling II · Functions, Tasks, and User-Defined Primitives · Switch Level Modeling 305 · System Tasks, Functions, and Compiler Directives 339 · Queues, PLAS, and FSMS Appendix A (Keywords and Their Significance) Appendix B (Truth Tables of Gates and Switches) References Index |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name entry element | Electronics |
700 ## - ADDED ENTRY--PERSONAL NAME | |
Personal name | Sundrai, B Bala Tripura |
942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
Source of classification or shelving scheme | |
Koha item type | Books |
Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Permanent Location | Current Location | Date acquired | Cost, normal purchase price | Full call number | Barcode | Date last seen | Cost, replacement price | Price effective from | Koha item type | Collection code |
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BSDU Knowledge Resource Center, Jaipur | BSDU Knowledge Resource Center, Jaipur | 2016-12-12 | 599.00 | 621.392 PAD | 002310 | 2020-02-12 | 599.00 | 2017-06-02 | Books | ||||||
BSDU Knowledge Resource Center, Jaipur | BSDU Knowledge Resource Center, Jaipur | 2016-12-12 | 599.00 | 621.392 PAD | 002311 | 2020-02-12 | 599.00 | 2017-06-02 | Books | ||||||
Not For Loan | BSDU Knowledge Resource Center, Jaipur | BSDU Knowledge Resource Center, Jaipur | 2016-12-12 | 599.00 | 621.392 PAD | 002312 | 2020-02-12 | 599.00 | 2017-06-02 | Books | Not for Loan |