Verilog Digital Computer Design: Algorithms into hardware
By: Arnold, Mark Gordon.
Material type:
BookPublisher: New Delhi Pearson Education 2010Description: 602.ISBN: 978-81-317-3371-4.Subject(s): ElectricalDDC classification: 621.392
| Item type | Current location | Collection | Call number | Status | Date due | Barcode |
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Books
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BSDU Knowledge Resource Center, Jaipur | Reference | 621.392 ARN (Browse shelf) | Not For Loan | 017776 |
Written by the co-developer of the Verilog Implicit To One hot (VITO) preprocessor, this text introduces the industry standard Verilog Hardware Description Language as a new way to explore enduring concepts in digital and computer design, such as pipelining. It shows how Verilog simulation is a tool for uncovering bugs prior to hardware fabrication, and how Verilog synthesis is a tool for automatically converting source code into hardware. Ideal for designers new to Verilog, it features a consistent design framework using ASM charts, and contains many realistic, practical examples.
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Understand the fundamental goals, structure, and behavior of Verilog; Discover how to use ASMs as the "master plan" for digital design; Walk through the three stages of Verilog design: behavioral, mixed, and structural; Learn Verilog simulation techniques for Mealy machines and bottom-testing loops; Use Verilog simulation techniques to model propagation delay; Leverage special-purpose design techniques to build general-purpose processors; Build a CPU from a ready-to-synthesize programmable logic example. Verilog Digital Computer Design: Algorithms to Hardware is more than a great guide to Verilog: it's a primer on the enduring concepts of computer design that will apply no matter which tools you choose.
Contents
Why Verilog Computer Design?
Designing ASMs
Verilog Hardware Description Language
Three Stages For Verilog Design
Advanced ASM Techniques
Designing For Speed and Cost
One Hot Designs
General- Purpose Computers
Pipelined General-Purpose Processor
Risc Processors
Synthesis
Appendices
A Machine and Assembly Language
B PDP-8 Commands
C Combinational Logic Building Blocks
D Sequential Logic Building Blocks
E Tri-State Devices
F Tools and Resources
G Arm Instructions
H Another View on Non-Blocking Assignment
I Glossary
J Limitation on Mealy with Implicit Style
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